1. CPLD/FPGA design for embedded platforms.
2. Familiar with HW platform testing related to CPLD/FPGA design.
3. Co-work with Hardware / Software team to debug and find out the root cause.
4. Maintain the current CPLD project.
5. Writing the CPLD specification.
6. Familiar with switch HW design or x86 CPU design is plus.
Experienced or interested in following topics :
#1 5G RAN related FPGA implementation.
#2 CPRI/ROE/eCPRI IP design.
#3 FPGA based HW accelerator design.
#4 Familiar with embed FPGA-SOC architecture.
#5 switch or x86 CPU platform related CPLD design.
#6 Edge computing or ML/AI related FPGA design.
若居住地較遠可選擇遠端面試
✓ 薪資福利
中秋/端午/年終獎金及禮券
結婚禮金
生育禮金
推薦人才獎金
績效及專案獎金
生日禮券
季度發放電影票及購物禮券
✓ 安心保險
出差旅平意外險
團體保險:包含配偶與子女
優質健康檢查方案